Abstract
Direct wafer bonding processes are being increasingly used to achieve innovative stacking structures. Many of them have already been implemented in industrial applications. This article looks at direct bonding mechanisms, processes developed recently and trends. Homogeneous and heterogeneous bonded structures have been successfully achieved with various materials. Active, insulating or conductive materials have been widely investigated. This article gives an overview of Si and SiO2 direct wafer bonding processes and mechanisms, silicon-on-insulator type bonding, diverse material stacking and the transfer of devices. Direct bonding clearly enables the emergence and development of new applications, such as for microelectronics, microtechnologies, sensors, MEMs, optical devices, biotechnologies and 3D integration.
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1. Introduction
Direct wafer bonding processes are becoming more and more attractive to achieve stacking structures. Direct bonding of surfaces has been used since the early 1960s and has strongly influenced the engineering of many innovative substrates and structures [1–3]. Philips Labs developed one of the first applications: direct bonding of mirrors for flat mirror gas laser structures [4, 5]. Since then, many processes have already been implemented in industrial applications. The most well-known application is the mass production of silicon on insulator (SOI) bonded structures. Recent advances have led to the emergence and development of bonded structures suitable for new applications such as for microelectronics, microtechnologies, sensors, MEMs, optical devices, biotechnologies and 3D integration.
Direct wafer bonding consists of connecting two wafer surfaces without any adhesive or additional materials to promote the adhesion between the two surfaces. It allows different materials to be stacked together without concern for the crystalline relationship between them. It is also well suited to layer transfer techniques. Direct bonding has been developed as an alternative route to many other bonding processes, such as anodic bonding [6], thermo-compression bonding [7], eutectic bonding [8], glass fritting [9] and polymer adhesive bonding [10]. Among the advantages of direct bonding over other technologies, some deserve to be underlined. For instance, there is no need for a specific material, such as alkaline glass, in anodic bonding or for an additional material, such as in eutectic bonding, glass frit soldering or adhesive bonding. Stacked structures formed by direct bonding can also withstand subsequent high temperature processes that would not be possible with polymer adhesive bonding or low melting point metal soldering. Additionally, most direct bonded structures can subsequently be processed using standard micro-technologies and microelectronics manufacturing tools, which is a key point for CMOS Front End compatibility and developing new stacked structures.
Very attractive results for various homostructures (film and substrate of the same material) or heterostructures (film and substrate of different materials) have been obtained by direct wafer bonding. The aim of this article is to present an overview of some recent process developments, bonded structures and trends for direct bonding.
2. Experiment and mechanism of direct bonding
Direct bonding is commonly performed in a clean room with hydrophilic or hydrophobic surfaces, after tuned physical and chemical surface preparation. Smooth surfaces and suitable surface bonds are needed to enable direct bonding. There is also a need to properly address key issues, such as low particle and metallic contamination levels, with aggressive surface preparation requirements to achieve high-yielding, strong-bonding and defect-free structures. The interaction between the two solid surfaces is a subject of considerable interest that has been extensively studied.
Processes have been developed and customized for stacking various materials. For instance, surface preparation and bonding processes were tuned for bare or processed surfaces of Si, SiO 2, SiGe, Ge, III–V, SiC, nitride, garnet, sapphire, diamond, glass, quartz, perovskite, metal, etc in order to succeed in direct wafer bonding [3], [11–13].
This approach opens a window to enabling many types of innovative engineered substrates, device structures and three-dimensional (3D) integration applications.
2.1. Si and SiO2 direct bonding
2.1.1. Surface preparation
For more than 20 years, direct bonding of silicon and SiO 2 has been used. Many techniques and surface conditioning processes have been developed for Si or SiO 2 surfaces (both film and bulk). The nature of each material, the state of its surface (i.e. surface bonds, micro-roughness and topography) and its structure (i.e. amorphous, single crystalline and polycrystalline) must be taken into account to develop new surface conditioning processes. Surface cleaning and surface preparation have to be customized for every single or composite material to insure high quality direct bonding. For most materials, conditioning processes result in hydrophilic surfaces that are well suited to spontaneous direct adhesion at room temperature. Although less commonly used, hydrophobic surfaces are also well suited to direct bonding.
Large non-uniformities of surface flatness (bowing, warpage and microroughness) can cause area bonding failure [14–16]. In the case of commercially available silicon wafers, bow and warpage values of approximately a few micrometers and root mean square (RMS) surface roughness of less than a few tenths of a nanometer (e.g. 0.6 nm for SiO 2 surfaces) must be achieved for high quality direct bonding [15], [17–19].
Direct bonded structures often need to be submitted to post-bonding thermal treatments. However, at the same time, a number of issues, such as outgassing species, trapped particles and weak bonding, can cause bonding defects to appear [20, 21]. To avoid these potential problems, conditioning processes must be specifically tuned [21, 22]. Widely used in surface preparation, wet cleaning is well suited to create the proper hydrophilic or hydrophobic surface state.
In the hydrophilic cases of silicon–silicon bonding, silicon–silicon oxide bonding or silicon oxide–silicon oxide bonding, Si or SiO 2 surfaces consist of a thin native oxide, a chemically generated oxide, a chemically modified oxide or a thermally grown oxide. In these instances, hydrogen bonds form between Si–OH groups present on each surface and between water molecules adsorbed onto the same Si–OH groups [3, 13, 20, 23, 24]. In addition to having the proper surface chemistry, the wafer must be adequately cleaned to remove surface contamination that may disturb the establishment of close wafer contact. Contamination such as particles, organic or metallic species affect bonding quality. Particles will locally disturb chemical bond formation. Organic compounds, from the ambient environment or from storage boxes, can inhibit proper chemical bond formation [25]. Metallic contaminants primarily come from process tools or consumables, such as chemicals, and can affect the electrical properties of the joined materials [26]. For instance, Maleville et al reported the importance of surface preparation to create void-free bonded structures for Smart Cut™ technology [27]. They showed a strong relationship between particle size (a few micrometer sizes) and the size of bonding defects (a few millimeters) at the SOI bonding interfaces.
However, one has to take care that the chemical formulations used for wafer conditioning preserve the surface micro-roughness to ensure bonding strength and quality. To remove organic contaminants, two approaches are commonly used based either on sulfuric acid (H 2 SO 4) hydrogen peroxide (H 2 O 2) mixture (SPM) or ozone diluted in deionized water.
SPM is also a very strong oxidizing agent that efficiently removes hydrocarbon contamination. Etching of SiO 2 is very low and thus this solution does not affect surface microroughness. On a Si wafer, the surface zeta potential of SPM is positive because of its low pH. Negative particles from the bath are attracted to the wafer, resulting in particle surface contamination.
Ozone dissolved in deionized water (DIO 3) is also a strong oxidizing agent able to decompose organic contaminants easily. However, ozone low solubility limits the number of available reactive species, and thus limits the potential oxidation. Thus it is not possible to remove a large quantity of organic residue: therefore, it is more adapted to the removal of airborne contaminants. However, ozone DIW cleaning has the advantage of simplicity, lower temperature, reduced water consumption and reduced chemical waste.
To remove particles after the organic removal step, surfaces are usually cleaned by ammonium hydroxide (NH 4 OH) hydrogen peroxide mixture (RCA-SC1 or SC1), which, furthermore, renders surfaces highly hydrophilic [28]. For instance, on Si wafers, this basic solution oxidizes and slightly etches the surfaces simultaneously, leading to an undercut and a removal of particles from the surface. It creates a chemical oxide whose thickness is about 0.6–1.2 nm. At the same time, the etching of Si or SiO 2 by SC1 can lead to surface roughening. It will then be necessary to properly define cleaning conditions (mixture concentration, temperature and time), and to optimize particle removal, hydrophilic surface properties and surface roughening together. At the same time, the high pH of the solution induces a zeta potential of the same sign for both the particles and the surface, which avoids any particle attraction. The resulting surface is covered by Si–OH groups on which water molecules can adsorb. But SC1 can induce the metallic contamination of surfaces that is enhanced by elevated pH. For this reason, SC1 cleaning is not used alone and is generally followed by acid solution cleaning.
After a DIW rinse, the metallic contamination possibly due to the previous SC1 step or already on the surface is easily removed by hydrochloric acid (HCl) hydrogen peroxide mixture (RCA-SC2 or SC2) [28] 3 . In the case of hydrophilic bonding, the SC2 concentration and temperature must be adjusted to optimize metal removal efficiency while minimizing both the surface hydrophilicity degradation and the surface particle contamination. Considering the low pH, the positive zeta potential induces attraction of negatively charged particles that can lead to contamination of the Si or oxide surfaces. An optional scrubbing step and a drying step are then performed immediately prior to bonding.
Following alternative methods, dry surface cleaning and conditioning processes have been studied in substitution of wet surface cleaning. Plasma activations, thermal treatments and UV/O 3 processes are shown to be very effective for organic contamination removal and for inducing modifications of the surface and near subsurface that result in high quality bonding, i.e. high bonding energies and defect-free bonding.
For the opposite case of hydrophobic bonding, interfacial bonding occurs due to pure van der Waals forces. In a first example to obtain a hydrophobic Si surface, a silicon wafer can be deoxidized by wet or dry hydrofluoric acid (HF). Such a treatment results in hydrogen passivated Si surfaces terminated by (Si–H), or (Si–H 2) or (Si–H 3) hydride species [29]. Because direct bonding of hydrophobic Si surfaces is driven by van der Waals forces, the bonding energy at RT is quite low and is very sensitive to surface roughness (the practical threshold is ∼0.3 nm RMS). Thus, in order to enable both surface passivation stability and direct bonding ability, roughening has to be minimized during surface preparation. In another example, surfaces can be saturated by siloxane bonds by high temperature thermal oxidation. The lack of Si–OH surface groups renders the surface hydrophobic [30].
2.1.2. Surface and bonding energies
For semiconductor applications, early reports on silicon or silicon dioxide surface direct bonding were first published in the 1980 s [1, 2, 31]. Direct bonding is feasible, thanks to van der Waals attraction, further strengthened by capillary forces, electrostatic Coulomb forces and hydrogen bonding in the case of hydrophilic surfaces. These adhesion forces allow two mirror-polished wafers to bond at room temperature without application of an external force.
After bonding at room temperature of silicon or silicon dioxide surfaces, bonding energies are still weak. Bonding energy values, which are twice the γ surface energy values (in the case of brittle material as SiO 2), are measured by a razor blade insertion at the bonding interface [32].
Figure 1 shows the variation in γ surface energies as a function of thermal annealing temperatures for the bonding of two hydrophobic silicon wafers and for the bonding of two hydrophilic oxidized Si wafers, where oxides have been thermally grown [33]. Typical weak values of 0.1–0.2 J m −2 for the bonding of hydrophilic native or chemically induced oxide or thermally grown SiO 2 surfaces and only a few tens of mJ m −2 for hydrophobic Si surfaces are obtained, allowing the bonding to be quite reversible (figure 1).
Figure 1 Variation of surface energies as a function of thermal annealing temperatures for the bonding of (a) two hydrophobic silicon wafers and (b) two hydrophilic thermally oxidized Si wafers [33].
To increase the bonding strength, thermal anneals are typically used to enhance the adhesion by modifying the interactions between silanols (Si–OH) into covalent siloxane bonds (Si–O–Si), in the hydrophilic bonding, or creating covalent silicon–silicon bonds, in the hydrophobic case [3, 27, 33]. Fourier Transform Infra Red spectroscopy operated in a Multiple Internal Reflection mode, FTIR-MIR, is well suited to evaluate bond types and densities at the bonding interface.
In the case of hydrophilic thermal SiO 2–thermal SiO 2 bonding, figure 2 shows clearly that the –OH band peaks are strongly modified for annealing temperatures over 250 °C. Water peaks (3200–3400 cm −1) decrease, when Si–OH peaks (3500–3700 cm −1) first increase and then decrease over 350 °C.
Figure 2 Evolution of the O–H absorption band in FTIR MIR experiments measured after post-bonding annealing at different temperatures [34].
At the same time, hard x-ray reflection (XRR) performed at the European Synchrotron Radiation Facility (ESRF) has been used to characterize the electron densities of the bonding gap. The sealing mechanism is shown in the top and middle of figure 3 in a good accordance with the XRR measurements. One can see that the bonding gap is significantly filled up during low temperature annealing when comparing the relative electron density profiles at RT and after 400 °C annealing for 2 h (figure 3, bottom). At this temperature, small unbonded zones are vertically enlarged to accommodate both the trapped water volume and the intimate closure everywhere else at the bonding interface. During higher thermal annealing, the bonding interface tends to completely fill up and disappear. At the same time, any out-gassing or by-product species that are formed can be evacuated from the structure.
Figure 3 Sealing mechanism of the oxide–oxide bonding at RT (top) and after annealing at 400 °C for 2 h (middle). The electron density profiles are shown on the bottom curve, at room temperature (solid line) and after annealing at 400 °C for 2 h (dashed line) [34].
In the non-symmetrical case of hydrophilic Si–SiO 2 bonding and using High Resolution Transmission Electron Microscopy (HRTEM) on cross-sections, one can observe the complete closure of the bonding interface after 1100 °C annealing for 2 h (figure 4). The bonding interface has disappeared, leaving an interface whose roughness is only a few crystalline planes thick.
Figure 4 HRTEM observation at the bonding interface of hydrophilic Si–SiO 2 bonding after 1100 °C annealing for 2 h.
2.1.3. Direct bonding mechanisms
Statistical models of rough surfaces and adhesive asperity contacts have been proposed to understand bonding mechanisms at nanometer scales [17, 35]. These models have been shown to be well suited for most bonded structures. The research into Si or SiO 2 surfaces has shown that immediately after bonding, only a few non-adhesive asperities of the wafer surfaces are intimately in contact with one another in accordance with the Hertz model [35]. Rieutord et al underlined that the surface high frequency micro-roughness plays a key role in the bonding phenomenon, while low frequency roughness can be accommodated by deformation of each substrate, with a little price to pay in elastic energy. In this view, the two silicon surfaces can be described by random rough surfaces with a Gaussian vertical distribution of roughness, as illustrated in figure 5.
Figure 5 Left: (0.5×0.5) μm 2 AFM observation of a silicon surface. The height scale is 2 nm black to white. Right: integrated height (roughness) distribution from the image ('bearing curve'). The solid line is a fit using a Gaussian model (error function) of 0.22 nm width [35].
Assuming such a Gaussian distribution of asperities with elastic Hertzian compression of the highest ones, Greenwood and Williamson calculated the number of summits in contact, the contact surface area and the bearing force [17]. Rieutord et al assume that, for hydrophobic bonding, attractive forces between two silicon wafers can be, in a first approximation, restricted to van der Waals forces. The equilibrium situation is readily obtained by balancing the attractive forces against the repulsive contact forces. This determines an equilibrium point for a distance of 0.9 nm typically (figure 6), which was confirmed by their XRR measurements. Just after bonding at room temperature, only a few non-adhesive summits of each surface are in intimate contact in accordance with the Hertz model [35].
Figure 6 Balance between van der Waals attraction (solid line) and asperity compression repulsion (dashed line) as calculated using Gaussian roughness models. The equilibrium distance and bond strength can be predicted from the intersection point [35].
When the system is heated, the interface between the two wafers evolves from non-adhesive contacts to adhesive contacts, due e.g. to the formation of covalent bonds at the contact points. The balance of forces, i.e. the minimization of the total energy, has then to include a new energy contribution from the adhesion in the contact area [35]. When additional adhesion energy proportional to the contact area is brought into the system, the two surfaces come very close to each other rapidly, as the price to pay in elastic energy remains small when using flat silicon surfaces compared to the adhesive energy gain.
In an alternative approach, considering Johnson, Kendall and Roberts' model (JKR) [36] at the contact level (i.e. considering adhesive contacts from the beginning), the relations change between interpenetration depth and contact pressure or surface area. Again, the mean distance between the two wafers decreases to values comparable to the mean roughness, and the actual contact area increases immediately, i.e. the interface fills up [35].
2.1.4. Interfacial defect management
In addition to defects associated with particles or insufficient cleaning conditions, there exist some defects whose origin lies in the bonding reaction itself. This is, for example, the case when hydrophilic silicon to silicon oxide bonding is considered. These defects are visible when ultra-thin oxide layers are involved and standard surface preparations are performed. An example of such defect distribution is given in figure 7. They can be visualized using IR imaging or scanning acoustic microscopy (SAM). Understanding the origin of these defects is thus of special importance when defect-free processes are to be developed.
Figure 7 SAM image of defects formed at Si–Si hydrophilic bonding after annealing (400 °C, 2 h, wafer diameter 300 mm).
The common origin of these standard defects in hydrophilic bonding is water. Due to the hydrophilicity of the wafers and the humidity of the clean-room ambient air, water is adsorbed at the interface of the contacting wafers and thus trapped at the interface after bonding. The amount of water is typically 2 monolayers. This water plays a positive role at room temperature to enhance bonding but a deleterious one during the annealing phase as it may react with silicon, producing additional silicon oxide and gaseous hydrogen [37]. Both the amount of oxide created (measurable using XRR) and the amount of released hydrogen (measurable by mass spectrometry) are consistent with the consumption of 2–3 water monolayers.
The produced hydrogen gas is confined in the narrow interface region as the hydrogen solubility in silicon is very low at room temperature. Hence the pressure of the gas increases upon reaction until it exceeds the mechanical strength of the interface, resulting in the formation of a defect blister [38].
The further growth of the formed defects is governed by diffusion of hydrogen in the interfacial region. This diffusion is thermally activated, corresponding to 2D concentric diffusion towards the defects from and through the silicon dioxide film [39].
At higher annealing temperatures, hydrogen solubility in silicon appears that reduces gradually the pressure in the interfacial region. It is observed that small blisters disappear suddenly while larger ones keep their radii unchanged. This behavior and the stability of blisters against dissolution can be explained by energetic arguments, taking into account the asymmetry of the surface energy terms upon opening and closure [39, 40].
Tuned treatments have been widely developed to overcome such issues. Ventosa et al performed pre-bonding thermal treatment of Si wafers at high temperatures, e.g. 500 °C, under nitrogen. Scanning acoustic microscopy (SAM) shows a clear decrease in defectivity of the bonded structure after 400 °C anneals (figure 8) [21]. This demonstrated that such prebonding treatments are efficient to induce water desorption prior to direct bonding [21, 22, 37]. Elsewhere, Fournel et al reported that low temperature and long thermal anneals facilitate lateral diffusion of degassing species. They enable the achievement of bonded structures free from defects all over the thermal range [41].
Figure 8 SAM observation of 200 mm Si–Si bonded structure after 400 °C anneal. Bonding is achieved after pre-bond surface thermal treatment at 500 °C [21].
2.2. Silicon-on-insulator (SOI) structures
In the 1980s, several direct wafer bonding processes were developed for hydrophilic surface bonding in order to make silicon-on-insulator (SOI) structures [3, 12, 42]. Today, SOI structures can be considered as the most well-known bonded structures considering their numerous applications in microelectronics, micro-technologies, MEMS applications, biotechnologies and optronics. The process starts with a clean surface on which oxide is either thermally grown or deposited forming the buried oxide layer. Smoothing and additional cleaning are performed to prepare the surface for bonding (figure 9). In most cases, the bonding process is then followed by a thermal annealing step tuned to strengthen adhesion after direct bonding.
Figure 9 Typical SOI fabrication process consisting of silicon surface preparation before direct bonding and thinning down of one wafer.
Moreover, depending on the applications, it may be necessary to reduce the thickness of at least one wafer, leading to a bonded film structure. Thinning of at least one of the bonded wafers down to a layer of a few micrometers in thickness is commonly achieved by mechanical techniques, such as grinding [42–44] or by chemical processes, wet or dry etching, or a lift-off technique [45]. In the case of single crystal layers, an alternative approach is required to achieve a film thickness of less than ∼2 μm. Specialized processes, such as the Soitec Smart-Cut™ technology [46–49] or the Canon Eltran ® process [50], were developed primarily in order to obtain a thin silicon layer onto a buried insulating oxide layer (Box). Now, SOI wafers formed by direct bonding are produced using high volume manufacturing processes. Within a few years after the initial introduction of these techniques, the quality of SOI layers could be compared to that of single crystal bulk silicon wafers.
In particular, quite high bonding energies have been targeted, keeping the objective of high quality for bonded structures. Influences of prebonding treatments and effects of diverse atmospheres for bonding have been extensively studied.
2.2.1. Patterned silicon-on-insulator wafers
The fabrication of patterned SOI bonded structures (PSOI) is required for specific applications where SiO 2 mesas are surrounded by either Si or other material areas or for applications where various box thicknesses are needed in the same bonded structure (figure 10).
Figure 10 SEM images of (a) a PSOI structure containing both ∼35 nm-thin and 200 nm-thick Box areas and (b) a PSOI structure with a 150-nm-thick Box area and a direct Si–Si bonded area [51] (© 2004 IEEE).
Direct bonding allows the transfer of patterned and unpatterned layers [52–54]. Specific chemical mechanical planarization (CMP) and cleaning processes are needed in order to achieve flat, smooth and contamination-free surfaces for the various materials to be bonded [49]. For instance, dishing induced by selective polishing or etching can result in poor bonding. To avoid dishing issues, CMP efficiency and surface smoothing are usually checked by AFM measurement, as shown in figure 11, in the case of (10×10) μm 2 thick SiO 2 patterned areas on a SiO 2 surface. Peaks of only a few nanometers still remain after efficient CMP, which is well suited for direct bonding [51].
Figure 11 Microroughness measurement in the case of (10×10) μm 2 thick SiO 2 patterned areas on a SiO 2 surface [51] (© 2004 IEEE). The CMP processes were tuned to smooth SiO 2 surfaces. Peaks of only a few nanometers still remain.
2.2.2. Low temperature bonding process
In order to bond wafers containing temperature-sensitive devices or to obtain heterostructures corresponding to the assembly of wafers made of two different materials, e.g. wafers whose coefficients of thermal expansion are very different, a bonding process that yields high bond strengths operating at a moderate temperature (<500 °C) is needed. Wafers with special dopant profiles or metal patterns, or heterostructures requiring bonding of wafers with significantly different thermal expansion coefficients, are typical applications that have promoted the investigation of alternative bonding techniques based on surface activation plasma treatments. For instance, such treatments have been used to generate silicon on glass (SOG) [55], strained SOI and SiGeOI structures [56] and accelerometers [57].
Plasma-assisted wafer bonding benefits from contributions of diverse chemical and physical mechanisms. For instance, plasma treatments efficiently remove contaminants, such as hydrocarbons or undesired species adsorbed onto the surface [58], and induce subsurface disordered layer [59].
Plasma treatment achieves a surface with a high hydrophilicity, increases silanol Si–OH groups densities, which allows a larger number of available bonding sites, and increases the bonding strength through the surface Si–OH group polymerization [3, 60, 61]. Figure 12 shows typical bonding energies, obtained after surface activations by various plasmas and their variations versus annealing temperatures, compared to values obtained with RCA cleaned surfaces [60]. It points out strong bonding, even after low temperature annealing [62, 63]. The mechanisms responsible for the increase in bonding energies after plasma activation are still hotly debated. Such an increase can be due to both a water diffusion enhancement away from the bonding interface and a siloxane bond formation, which can be promoted by the subsurface disordered layer [59].
Figure 12 Typical Si–SiO 2 bonding energies obtained after surface activations by various plasma treatments, and their variations versus annealing temperatures, compared with values obtained with RCA (o) cleaned surfaces.
2.3. Diverse material stacking
2.3.1. Homogeneous or heterogeneous stacked structures
In parallel, these direct bonding technologies have been extended to other materials, bare or patterned or processed, to enable the fabrication of either homogeneous or heterogeneous stacked structures. Innovative bonded structures with diverse active materials, such as Si, Ge, SiGe, SiC and III–V compounds, or with various insulating materials, such as SiO x , SiN x , Al 2 O 3, sapphire, diamond, fused silica, glass, quartz or with specific properties, such as LNO, LTO, garnet or with electrical conductors, such as metals, have been successfully achieved. For each material surface, preparation has to be tuned. Very attractive results for various homo-structures or hetero-structures have been obtained by direct wafer bonding. Diverse active top layers, such as 〈100〉/〈110〉 hybrid oriented Si, strained-Si and SiGe with thicknesses between 5 and 100 μm onto 300 mm Si wafers, have been successfully fabricated using direct bonding.
Direct wafer bonding enables stacking of a single crystal film on a substrate when it is not possible to grow it by epitaxy. This is the case if the substrate surface is amorphous, or if the lattice parameter mismatch between the film and substrate is too high to allow epitaxy. The bonding of two hydrophobic silicon wafer surfaces that have very different doping concentrations and possible lattice parameter mismatches, and then thinning one of the two wafers, enables the fabrication of innovative bonded structures [3].
For various applications, a single crystalline layer also needs to be transferred onto a low cost substrate or onto a substrate with a matched thermal expansion coefficient or onto a substrate with a matched or a different lattice parameter enabling the fabrication of new engineered substrates for epitaxy.
2.3.2. Si–Si hydrophobic bonding
Conductive bonding can be performed by the direct bonding of two conductive surfaces. In the case of Si wafers, hydrophobic bonding allows the presence of a single grain boundary at the bonding interface, as shown in the cross-sectional transmission electron microscopy (TEM) image (figure 13) [65].
Moreover, using an original crystalline disorientation control process, pure twist dislocation networks were achieved with a period that depends on the angles between the corresponding crystal axes of each single crystal wafer [66].
An angle accuracy of 10−3 degrees allows control of the dislocation period at the nanometer scale. No oxide layer or oxide precipitates were put into evidence at the bonding interface. Noteworthy is that bonding the two crystals with a very low angle separates the dislocations up to several tenths of micrometers.
2.3.3. Intermediate buried layers and host substrates
Bonded structures can also be manufactured with a variety of buried intermediate layers (i.e. with various dielectric constants, diverse thermal conductive coefficients, etc) combined with a diversity of host substrates (i.e. Si, fused silica, glass, quartz, sapphire, etc) [48, 49].
As an example, silicon-on-insulating-multilayer (SOIM) structures were fabricated by bonding directly wafers capped with nitride layers in place of oxide [67, 68]. Figure 14 shows a typical cross-sectional SEM observation of an SOIM structure, made of a 240-nm-thick Si layer on top of a 400-nm-thick CVD Si 3 N 4 bonded to 400 nm thick thermal SiO 2 as buried insulating layers. This puts into evidence the complete closure at the bonding interface.
Figure 14 SOIM structures fabricated by bonding wafers capped with nitride and oxide superficial layers in place of the buried pure oxide [67].
Surface preparations have been tuned in terms of cleaning, chemical mechanical polishing, post deposit thermal treatment, etc. Taking care of an efficient surface preparation, surface energies obtained were quite comparable to those obtained with Si–SiO 2 (figure 15) [67, 68].
Figure 15 Surface preparation leading to surface energies quite comparable to Si–SiO 2 and Si 3 N 4–Si 3 N 4 bonding and slightly lower for Si 3 N 4–SiO 2 [67].
Elsewhere, SOI technology had to take into account the issue of potential self-heating in the upper device layer. One solution consists of replacing the buried SiO 2 with another buried dielectric layer having a higher thermal conductivity. Among the various materials investigated to date, alumina or diamond stand as worthwhile candidates.
Al 2 O 3 thermal conductivity is an order of magnitude higher than that of thermal oxide, and Al 2 O 3 films deposited using atomic layer deposition (ALD) onto Si wafer are suited for direct bonding. New SOI-type structures with an ALD–Al 2 O 3 buried layer were successfully achieved. Cross-sections of such bonded structures were observed by scanning electron microscopy (SEM) after annealing at 1100 °C to strengthen the bonding interface (figure 16) [69].
Figure 16 Cross-sectional SEM observation of an ALD–Al 2 O 3 bonded structure after annealing at 1100 °C [69].
2.4. Transfer of devices
Alternatives to the surface preparation tuning have also been investigated based on the deposition of intermediate layers. Silicon oxide layers, for instance, on various types of surface, bare or patterned or processed, are well suited to enable direct bonding between wafers, whatever their nature. This enables one to carry out many various generic, alternate or specific bonded structures. The bonding energy is high enough that thinning post processes can be applied to the bonded pair (figure 17). If the initial patterned surface is to be kept on top of the final structure, the transfer and thinning process is carried out twice.
Figure 17 Transfer of an integrated circuit thin film onto a substrate.
2.4.1. Metal bonding
Metal bonding is extensively studied and used for MEMS sealing, power devices, heat dissipation or 3D interconnections. Techniques such as thermo compression, with or without eutectic alloys, bumps with low temperature solders or direct bonding, are extensively used. With direct bonding, the first vertical electrical interconnection was demonstrated with W–Si or Pd–Si bonding with the creation of a silicide during annealing [70, 71]. For several years, the surface activated bonding (SAB) method has been used for metal wafer bonding [72]. Usually, copper–copper diffusion bonding requires 400–700 °C thermo-bonding to obtain the highest quality bond strengths. Using the SAB process, Suga et al have shown that the bonding temperature can be reduced to 200 °C. Moreover, if the surface is smoothed by CMP, strong bonding at room temperature becomes possible [73].
More recently, we have developed direct hydrophilic copper–copper bonding at room temperature, atmospheric pressure and ambient air without applying an external stress. The surfaces are prepared by a chemical mechanical polishing step [74, 75]. This very simple preparation allows one to use standard wafer to wafer aligner equipment to obtain an alignment in the ±1 μm range. It was also implemented for die to wafer bonding [76].
The macroscopic evolution of the direct copper bonding with temperature has been studied with low magnification dark field electron microscopy (TEM). A TEM cross section of a non-annealed bonded pair reveals a thin copper oxide interfacial layer at the bonding interface (figure 18) [77]. At 200 °C, this copper oxide becomes thermodynamically unstable [78], and copper diffusion through the grain boundaries occurs, leading to grain growth. The bonding interface turns into a grain boundary with a high bonding energy [79]. At the copper grain boundaries, small full or partially voided nodules are formed. Energy Dispersive X-ray Spectrometry Detection (EDX) confirms the presence of the remaining copper oxide in these nodules [79].
Figure 18 TEM cross section of direct Cu–Cu bonding without any thermocompression: observations (a) as bonded, and after 30 min post bonding anneal at: (b) 200 °C, (c) 300 °C and (d) 400 °C [79] (© 2010 IEEE).
This mechanism is similar to diffusion bonding, except that no external pressure is applied. The diffusion bonding has been extensively studied in metal sintering [80] and consists of a plastic deformation of the asperities of both metal films. In our case, we have direct bonding at room temperature. With temperature, the strengthening of the interface is obtained by a diffusion-like mechanism.
X-ray reflectivity (XRR) analysis enables a fine resolution of Cu–Cu bonding interface electron density (figure 19). For post bonding annealing at around 200 °C, the increase in electron density at the bonding interface indicates its sealing.
Figure 19 Cu–Cu bonding interface electron density evolution measured by XRR for temperatures around 200 °C.
An optimized CMP-based process was implemented on a patterned surface to reach a high surface planarization level (figure 20). Thanks to copper pad expansion with temperature and an alignment tool, high quality patterned wafer bonding was obtained within the wafer [81]. Figure 21 shows an optical view of a patterned wafer bonded pair right after one of the silicon wafers was removed.
Figure 20 Damascene CMP process with dishing controlled on the copper pads. A dishing of less than 10 nm is achieved on 5 μm copper pads.
Figure 21 Top view of 10 μm pitch direct Cu/SiO 2 bonding after total top silicon removal.
Nevertheless the characterization method of choice is the electrical behavior of bonded daisy chains. Daisy chains with 30 000 connections with 3×3 μm 2 contact areas were operational all over a substrate for both 200 °C and 400 °C bonding annealing. Considering a chip size of 2 mm 2, the density of the interconnections is estimated to be around . Perfect ohmic behavior is observed for all of the tested structures. A specific contact resistance of around 22.5 mohm μm 2 was extracted [82].
The same work was done for tungsten bonding (figure 22). The bonding energy of 1.45 J m −2 was obtained for a 800 °C annealing on plain wafers. The ohmic behavior of the bonding was verified [83].
Figure 22 SEM cross section of W–W bonding after 200 °C annealing. The bonding interface is underlined by a dark line imaging an oxide [83] (© 2010 IEEE).
3. Conclusion
In this article, an overview has been presented of some recent developments in direct bonding processes, of diverse bonded structure achievements and of trends for direct bonding. Very attractive results for various innovative homostructures or heterostructures have been obtained by such techniques. First, we focused on Si or SiO 2 bonding, in terms of surface preparation, bonding energies, bonding mechanisms and defect generations. If a main application remains the bonded SOI fabrication, process windows had been opened to low temperature bonding processes, patterned surface direct bonding and bonding processes for alternative structures involving diverse materials, which have to be properly chosen to fit specific applications. In addition, a variety of active materials have been studied. Additionally, it is worth noting the new interest in bonding processes with diverse intermediate layers and host substrates, including processed wafers. To address this last point, metal bonding is being investigated more and more. Very impressive and promising results have already been obtained. They open up new fields of innovative applications.
Acknowledgments
The authors would like to thank Soitec for financial support. We also thank our colleagues from CEA-LETI-D2NT-LTFC Lab for fruitful discussions, realizations and characterizations and CEA-LETI-DPTS-SCPIO Labs for help in characterizations. The BM32 beamline is a facility run by CEA and CNRS.
Footnotes
RCA-SC1 or RCA-SC2 cleaning refers to basic cleaning procedure developed by Kern W 1965 at Radio Corporation of America.